Series A funding accelerates QuamCore’s transition from simulation to fabrication, targeting a breakthrough superconducting architecture capable of scaling to one million qubits.
Highlights
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Major Series A Raise: QuamCore has completed a $26 million Series A round, bringing total funding to $35 million, including a $4 million non-dilutive grant from the Israel Innovation Authority, led by Sentinel Global and Arkin Capital.
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Scalable Cryostat Innovation: The company’s architecture embeds superconducting control logic directly within the cryostat, eliminating excessive cabling and enabling up to one million qubits in a single chamber, a leap far beyond current ~5,000-qubit systems.
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From Design to Fabrication: Funding will support transitioning from simulation to first-generation chip production, establishing a quantum lab, and scaling operations around the breakthrough architecture with built-in error correction for real-world viability.
Summary
QuamCore, an Israeli deep-tech startup, has raised $26 million in a Series A funding round—including support from Sentinel Global, Arkin Capital, and a $4 million grant from the Israel Innovation Authority—bringing its total capital to $35 million.
The company is developing a groundbreaking superconducting quantum architecture designed to fit one million qubits in a single cryostat. This is achieved by embedding ultra-low-power control logic directly inside the cryogenic chamber, which drastically reduces cabling and thermal loads—two major scaling bottlenecks in quantum hardware.
With the new funding, QuamCore plans to move from architecture and simulation to real-world chip fabrication, set up a dedicated quantum lab, and begin scaling operations. The company’s goal is to enable fault-tolerant quantum systems with global applications in drug discovery, materials science, AI, and energy. This architecture-first strategy marks a potential turning point in quantum scalability, repositioning superconducting qubits as a commercially viable platform once bottlenecked by thermal and cabling constraints.
